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徐小波
長安大學副教授
徐小波,男,副教授,碩士生導師。先後在合肥工業大學、西安電子科技大學攻讀學士、碩士和博士學位。2012年4月至今在長安大學電子與控制工程學院從事教學科研工作。在教學方面,指導學生參加電子競賽獲陝西省一等獎1次,國家二等獎1次,主持教改項目1項;在科研方面,主持國家自然科學基金、博士后科學基金、陝西省自然科學基金各1項,參與項目多項。和他人合作獲發明專利2項。在IEEE Transactions on Electrons Devices、Solid State Electronics、Superlattices and Microstructures、Chinese Physics B、Chinese Physics Letters等期刊公開發表第一作者學術論文20多篇,其中13篇SCI收錄(二區1篇,三區8篇,四區4篇),6篇EI收錄,擔任IEEE Microwave and Wireless Components Letters、Journal of Physics and Chemistry of Solids、International Journal of Electronics等國外頂級期刊審稿人。
主要研究領域或方向:光伏發電領域中的核心電學參數提取及優化演演算法研究(人工智慧演演算法在太陽能電池和組件參數評估中的應用,python實現),電路設計領域中的SPICE模型參數建模及可靠性演演算法分析。、
目錄
[1] Xiao-Bo Xu,Wen-Ping Gu, Si Quan, Zan Zhang, Lin Zhang. Early effect of box, triangular and trapezoidal Ge profiles for SiGe HBTs. Superlattices and Microstructures, 2017. 603-609 (SCI JCR三區 IF: 2.123)
[2] Xiao-Bo Xu,Xiao-Yan Wang, Wen-Ping Gu, Si Quan, Zan Zhang. Study on influences of CdZnS buffer layer on CdTe solar cells. Superlattices and Microstructures, 109, 2017, 463-469 (SCI JCR三區 IF: 2.123)
[3] Xiaobo Xu,Xiaoyan Wang, Wenping Gu, Si Quan. Current Crowding Effect of Equilateral Polygon Emitter Transistors. IEEE Transactions on Electron Devices,64(6), 2017, 2770-2772. (SCI JCR 二區 IF: 2.605 )
[4] 徐小波,張林,王曉艷, 谷文萍,胡輝勇, 葛建華, Si和SiGe三極體Early效應電路模擬模型綜述,電子學報, 44(7),2016, pp 1763-1771 ( EI)
[5] 徐小波,王曉艷, 谷文萍, 張林, 全思, 葛建華, 低光強下CdTe太陽電池的性能研究. 半導體光電, 37(6), 2016, pp 796-799.
[6] 徐小波,王曉艷,李艷波,胡輝勇,葛建華, SOI SiGe HBT集電結渡越時間模型研究,微電子學, 45(5), 2015, pp 681-684.
[7] Xu Xiao-Bo, Zhang Bin, Yang Yin-Tang, and Li Yue-Jin, An analytical model of SiGe heterojunction bipolar transistors on SOI substrate for large current situation, Chinese Physics Letters, 2013, 30(2): 028502-1~4; (SCI: 000315217000060 JCR四區 IF: 0.8)
[8] Xiao-Bo Xu He-Ming Zhang, Hui-Yong Hu, and Jiang-Tao Qu, Early effect of SiGe heterojunction bipolar transistors, Solid State Electronics, 2012, 72(6): 1-3; (SCI: 000304585400001 JCR 三區 IF: 1.58)
[9] Xu Xiao-Bo, Zhang He-Ming, Hu Hui-yong, Ma Jian-Li), and Xu Li-Jun, Analytical base–collector depletion capacitance in vertical SiGe heterojunction bipolar transistors fabricated on CMOS-compatible silicon on insulator, Chinese Physics B, 2011 20(1): 018502-1~5; (SCI: 000286676000102 JCR 三區 IF: 1.223)
[10] Xu Xiao-Bo, Zhang He-Ming, Hu Hui-yong, and Ma Jian-li, Early effect modeling of silicon-on-insulator SiGe heterojunction bipolar transistors, Chinese Physics B, 2011 20(5): 058502-1~6; (SCI: 000290665200075 JCR 三區: 1.223)
[11] Xu Xiao-Bo, Zhang He-Ming, Hu Hui-yong, and Qu Jiang-tao, Substrate bias effects on collector resistance in SiGe heterojunction bipolar transistors on thin film silicon-on-insulator, Chinese Physics B, 2011 20(5): 058503-1~5; (SCI: 000290665200076 JCR 三區: 1.223)
[12] Xu Xiao-Bo, and Zhang He-Ming, An analytical avalanche multplcation model for partially depleted silicon-on-insulator SiGe heterojunction bipolar transistors, Chinese Physics letters, 2011 28(7): 078505-1~4; (SCI: 000293141800088 JCR 四區: 0.8)
[13] Xu Xiao-Bo, Xu Kai-Xuan, Zhang He-Ming, and Qin Shan-Shan A device model for thin silicon-on-insulator SiGe heterojunction bipolar transistors with saturation effects, Chinese Physics B, 2011 20(9): 098501-1~5; (SCI: 000295964200078 JCR 三區: 1.223)
[14] Xu Xiao-Bo, Zhang He-Ming, Hu Hui-yong, Li Yu-Chen, and Qu Jiang-Tao, Weak avalanche multiplication in SiGe HBTs on thin film SOI, Chinese Physics B, 2011 20(10): 108502-1~6; (SCI: 000295969000077 JCR 三區: 1.223)
[15] Xiaobo Xu, Heming Zhang, Huiyong Hu, Jianli Ma, and Lijun Xu, Generalized Early voltage model of bipolar transistors for linearly graded germanium in base, Applied Mechanics and Materials, 2012 110-116: 3311-3315; (EI)
[16] Xiaobo Xu, Heming Zhang, Huiyong Hu, Shanshan Qin, and Jiangtao Qu, Collector resistance of accumulation-subcollector transistors for SOI SiGe BiCMOS technology, Applied Mechanics and Materials, 2012 110-116: 5452-5456; (EI)
[17] 徐小波,張鶴鳴,胡輝勇,許立軍,馬建立,SOI部分耗盡SiGe HBT 集電結空間電荷區模型,物理學報,2011 60(7): 078502-1~9; (SCI: 000293366300119 JCR 四區: 1.013)
[18] 徐小波,張鶴鳴,胡輝勇,SOI部分耗盡SiGe HBT 集電結耗盡電荷和電容改進模型,物理學報,2011 60(11): 118501-1~5; (SCI: 000298442100115 JCR 四區: 1.013)
[19] Xiaobo Xu, Kaixuan Xu, and Heming Zhang, Collector depletion region investigation of SOI SiGe HBTs, IEEE 2011 International Conference on Electric Information and Control Engineering (ICEICE 2011), Wu Han, China, 2011.04, 2039-2043; (EI)
[20] Xiaobo Xu, Heming Zhang, Huiyong Hu, Jiangtao Qu, Jianli Ma, and Shanshan Qin, Negative substrate bias effects on collector resistance in SiGe HBTs on thin film SOI, IEEE 2011 International Conference on Electric Information and Control Engineering (ICEICE 2011), Wu Han, China, 2011.04, 2380-2382; (EI)
[21] Xiaobo Xu, Heming Zhang, Huiyong Hu, Jiangtao Qu, and Jianli Ma, Weak avalanche multiplication model for fully depleted silicon-on-insulator SiGe heterojunction bipolar transistors, IEEE 2010 International Conference on Modeling, Simulation and Control (ICMSC 2010), Cairo, Egypt, 2010.11; (EI)
[22] Qin Shan-Shan, Zhang He-Ming, Hu Hui-Yong, Wang Guan-Yu, Wang Xiao-Yan, Xu Xiao-Bo, and Qu Jiang-Tao, A two-dimensional subthreshold current model for strained-Si MOSFET, Science in China: Series G,2011, 54(12): 21811~2185; (SCI: 000297361000011)
[23] Qin Shanshan Zhang Heming, Hu Huiyong, Xu Xiaobo, and Wang Xiaoyan, An analytical model for the subthreshold current of fully depleted strained-SOI MOSFET , Applied Mechanics and Materials, 2012, 110-116: 3332-3337; (EI)
[24] Song Jian Jun, Shan Heng Sheng, Zhang He Ming, Hu Hui Yong, Wang Guan Yu, Ma Jian Li, Xu Xiao Bo, Model of DOS near the top of valence band in strained SiGex/(001)Si, Recent Trends in Materials and Mechanical Engineering Materials, Mechatronics and Automation, 2011, 55-57: 979-982; (EI)
[25] Qu Jiangtao, Zhang, Heming, Hu, Huiyong, Xu, Xiaobo, Wang, Guan-Yu, and Wang, Xiao-Yan, The impact of Drain-Induced Barrier Lowering effect on threshold voltage for small-scaled strained Si/SiGe nMOSFET, Applied Mechanics and Materials, 2012, 110-116: 5457-5463; (EI)
[26] Qu Jiang Tao, Zhang He Ming, Xu Xiao Bo, and Qin Shan Shan, Study of Drain Induced Barrier Lowering(DIBL) effect for strained Si Nmosfet, Procedia Engineering, 2011, 16: 298-305; (EI)
[27] Qu Jiang-Tao, Zhang He-Ming, Qin Shan-Shan, Xu Xiao-Bo, and Hu Hui-Yong, Study of threshold voltage modeling for small-scaled strained Si nMOSFET, IEEE 2011 International Conference on Electric Information and Control Engineering (ICEICE 2011), Wu Han, China, 2011.04, 4507-4510; (EI)
[28] 屈江濤,張鶴鳴,秦珊珊,徐小波,王曉艷,胡輝勇,小尺寸應變Si NMOSFET物理模型的研究,物理學報,2011,60(9): 098501-1~7; (SCI: 000295114000113)
[29] 屈江濤,張鶴鳴,胡輝勇,徐小波,王曉艷,小尺寸應變Si/SiGe PMOSFET閾值電流電壓特性的研究,電子科技大學學報, 2012, 41(2): 311-316;(EI)
[30] 張濱,楊銀堂,李躍進,徐小波,SOI SiGe HBT電學性能研究,物理學報,2012, 61(23), 238502-1~9; (SCI index source)
[31] Jian-Li Ma, He-Ming Zhang, Jian-Jun Song, Qun Wei, Xiao-Yan Wang, Guan-Yu Wang, and Xiao-Bo Xu, Energy Band Structure of Silicon Under Uniaxial Stress in the (110) Plane Along an Arbitrary Direction, Chinese Journal of Physics 2011, 49(6): 1244~1254; (SCI: 000299878200012)
[32] 馬建立,張鶴鳴,宋建軍,王曉艷,王冠宇,徐小波,單軸<111>應力硅價帶結構計算,物理學報 2011,60(8): 087101-1~8 (SCI: 000294392400077);
[33] Jian-Li Ma, He-Ming Zhang, Xiao-Yan Wang, Qun Wei, Guan-Yu Wang and Xiao-Bo Xu, Valence band structure and hole effective mass of uniaxial stressed Germanium, Journal of Computational Electronics, 2011, 10(4): 388-393; (EI)
[34] Ma Jianli, Zhang Heming, Song Jianjun, Wang Guanyu, Wang Xiaoyan, and Xu Xiaobo. Impact of [110]/(001) uniaxial stress on valence band structure and hole effective mass of silicon, 2011, Journal of Semiconductors, 32(2): 022002-1~5; (EI)
[35] Xu Li-Jun, Zhang He-Ming, Hu Hui-Yong, Xu Xiao-Bo, and Ma, Jian-Li, The study of direct tunneling current in strained MOS device with silicon nitride stack gate dielectric, Applied Mechanics and Materials, 2012, 110-116: 5442-5446; (EI)
[36] Xu Li-Jun, Zhang He-Ming, Hu Hui-Yong, Xu Xiao-Bo, and Ma, Jian-Li, The study of parallel strain distribution in channel of PMOSFET with silicon-germanium source and drain regions, IEEE 2011 International Conference on Electric Information and Control Engineering (ICEICE 2011), Wu Han, China, 2011.04, 4677-4680; (EI)
[37] Yuchen Li, Heming Zhang, Huiyong Hu, Xiaobo Xu, Chunyu Zhou, and Bin Wang, A Compact Threshold Voltage Model for the Novel High-Speed Semiconductor Device IMOS, 2011 International Conference of Electron Devices and Solid-State Circuits (EDSSC 2011), 2011, 1-2;(EI)
[38] 李妤晨,張鶴鳴,張玉明,胡輝勇, 徐小波,秦珊珊,王冠宇,新型高速半導體器件IMOS閾值電壓解析模型,物理學報,2012,61(4):047303-1~5;(SCI: 000301563800068)